Input and output signal levels of chips included in semiconductor devices generally decrease as chip design rules decrease. For example, when chips are manufactured in a 0.5 μm process or more, input and output signal levels are often 5 volts or more. On the other hand, when chips are manufactured in a 0.35 μm process or less, input and output signal levels are set to 3.3 volts or less. Some chips manufactured in the 0.35 μm process can be operated in response to not only 3.3 volt level signals, but also 5 volt level signals using well known tolerant techniques.
Hereinafter, as one example of systems for processing different levels of signals, a system including a smart card and a smart card reader/writer apparatus will be considered. In operation, the smart card reader/writer apparatus sends a clock signal CLK and a reset signal RST to the smart card and also exchanges a data signal D with the smart card.
Semiconductor chips integrated in a main body of the smart card are limited to a specification due to global standards for electronic cards so that the chips have lagged in miniaturization, in particular, in reducing supply voltage. By contrast, semiconductor device chips used by the smart card reader/writer apparatus continue to increase miniaturization in a semiconductor production process, that is, consume less power supply voltage due to no specification limitation. Specifically, the semiconductor chips integrated in the main body of the smart card are manufactured in 0.5 μm processes to be driven at 5 volts. On the other hand, the semiconductor chips used by the smart card reader/writer apparatus are manufactured in below 0.35 μm (e.g., 0.25 μm) processes to be driven at 3.3 volts.
It is possible to drive the semiconductor device chips of the above-mentioned reader/writer apparatus operating with 3.3 volt level signals using 5 volt level input signals by applying a known tolerant technique. However, an increase in the chip output signal levels from 3.3 volts to 5 volts makes the chip more complex, larger in size, and higher in cost. Moreover, low voltage (3.3 volts) driven less power-consuming chips are manufactured in 0.35 μm processes to operate at 5 volts. This results in inefficient performance.
The above-mentioned problem is manifested when a substrate of the reader/writer apparatus operates at 3.3 volt signal levels and a portion of pins in the semiconductor device corresponds to a 5-volt drive system, such as the smart card which inputs and outputs 5 volt level signals, as described above.